work SDRAM Contoller Chisel Generator Final project for CSE 228A - Agile Hardware Design SV Assertion Generator For SDRAM Controller Generator - final project for CSE 216 Sorting Accelerator on ULX3S ECP5 FPGA Dev Board Project for CSE 293 - Verilog to Silicon Water Sensor Module Capstone Project for the Computer Engineering BS at the University of California, Santa Cruz Spiking Neural Net on FPGA Practice with SNNs fun Simple Configurable Logic Block on Tiny Tapeout A 3 bit CLB on Sky130 ECP5 FPGA Project Template A Github Template Repository for getting started on ECP5 FPGAs using OSS-CAD Suite Pandoc Slides Template Repository A Github Template Repository for getting started with Pandoc Slides Game Emualator A console emulator created using C++ and SDL2 Web Application SDRAM Controller Generator Webapp to deploy SDRAM controller generation to other users using the MERN stack
